The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device, in particular, to a technology effective when applied to a semiconductor device having a package structure in which an external terminal electrically coupled to the back surface of a semiconductor chip and an external terminal electrically coupled to a bonding pad formed on the surface of the semiconductor chip are exposed from the lower surface of a resin molding.
For example, Japanese Patent Laid-Open No. 2007-324523 (Patent Document 1) discloses a method of sintering a metal paste composed of metal powders and an organic solvent and applied to a semiconductor chip to obtain sintered powder metal, mounting a Ni plate on the semiconductor chip, heating and applying a pressure to them to bond the semiconductor chip and the Ni plate.
Japanese Patent Laid-Open No. 2004-126622 (Patent Document 2) discloses a technology of mounting, in high density, light emitting diodes each equipped with a plurality of electrodes provided on a substrate with a space therebetween, a plurality of light emitting diodes provided on the electrodes, respectively, via a conductive adhesive, and an insulating layer provided on the substrate so as to surround the conductive adhesive with the insulating layer, wherein the insulating layer is made of a material having poor wettability to the conductive adhesive.
Japanese Utility Model Laid-Open No. 59357/1988 (Patent Document 3) discloses a light emitting diode having a rough back surface and an ohmic electrode provided on a portion of the rough surface and firmly bonded, on the back surface side, to a base via a conductive adhesive.
[Patent Documents]    [Patent Document 1] Japanese Patent Laid-Open No. 2007    [Patent Document 2] Japanese Patent Laid-Open No. 2004-126622    [Patent Document 3] Japanese Utility Model Laid-Open No. 59357/1988